Standard and low-precision binary formats #
Named FloatFormat descriptors cover IEEE interchange formats, common machine-learning formats,
and a 256-bit IEEE-style layout. They are all values of the same FloatFormat structure used by
custom formats; no operation or theorem is duplicated for a named encoding.
References #
- IEEE Standard for Floating-Point Arithmetic, IEEE 754-2019, Section 3.6, https://doi.org/10.1109/IEEESTD.2019.8766229.
- D. Kalamkar et al., A Study of BFLOAT16 for Deep Learning Training, 2019, https://arxiv.org/abs/1905.12322.
Structural equality of two binary-interchange layouts.
Backend capabilities should depend on these computational fields rather than descriptor names.
The proof fields in FloatFormat are propositions, so matching the stored layout recovers full
descriptor equality.
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Two descriptors with the same stored layout are equal.
IEEE binary16, commonly called half precision.
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Bfloat16, with the normal exponent range of binary32 and eight significand bits.
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IEEE binary32, commonly called single precision.
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IEEE binary64, commonly called double precision.
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Structural capability for the binary32 native backend.
The theorem below recovers full descriptor equality before any carrier cast.
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A format with the binary32 storage layout is binary32.
Structural capability for the binary64 native-storage backend.
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A format with the binary64 storage layout is binary64.
The named binary32 descriptor satisfies its data-only backend predicate.
Binary32 does not satisfy the binary64 backend predicate.
Binary64 does not satisfy the binary32 backend predicate.
The named binary64 descriptor satisfies its data-only backend predicate.
IEEE binary128, commonly called quadruple precision.
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A named 256-bit IEEE-style layout with a 237-bit significand.
It uses 19 exponent bits and 236 stored fraction bits. Arbitrary wider layouts remain available
by constructing FloatFormat directly.
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Low-precision and finite-only formats #
OCP/ONNX E5M2: bias 15 with IEEE-style infinities and NaNs.
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Compact semantic TensorFloat-32 layout with eight exponent and ten fraction bits.
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OCP/ONNX E4M3FN: bias 7, no infinity, maximum fraction at maximum exponent is NaN.
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ONNX E4M3FNUZ: bias 8, one zero, and the negative-zero word as the sole NaN.
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ONNX E5M2FNUZ: bias 16, one zero, and the negative-zero word as the sole NaN.
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OCP MX FP4 E2M1: bias 1 with every stored word finite.
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OCP MX FP6 E2M3 element format with every stored word finite.
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OCP MX FP6 E3M2 element format with every stored word finite.