Effective Rounding in Tensor Semantics #
This example uses the same shape-indexed tensor operation twice. The FP32 tensor gives the
proof-oriented rounded-real semantics. The IEEE32Exec tensor executes binary32 arithmetic from
bits. On a finite result, the IEEE bridge and the effective rounding calculation identify the
same canonical mantissa and exponent.
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Executable binary32 tensors used by the example.
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This addition executes pointwise in the bit-level IEEE32 model.
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Proof-oriented tensors use the same tensor API with rounded-real FP32 scalars.
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Every proof-oriented tensor entry exposes the effective nearest-even representation.
Every executable tensor entry reaches the same effective representation once finiteness is checked. The finiteness premise is discharged by computation for the concrete $1+2$ example.
Exact subtraction, local spacing, and absorption #
Sterbenz's lemma certifies the concrete binary32 subtraction $2-1$ as exact.
The corresponding executable binary32 operation also denotes the exact real subtraction.
The executable ULP exponent at 1.0 is -23.
The computed exponent therefore denotes the mathematical ULP at 1.0.
NaN and infinity have no finite ULP exponent.
Adding the smallest positive subnormal does not change executable binary32 1.0.
The executable absorption result transports to the rounded-real binary32 specification.
Named rounding modes and fused enclosures #
The public mode API avoids passing a raw integer-rounding function at each call site.
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Directed rounding gives a certified lower endpoint, not merely a differently named value.
A concrete fused multiply-add lower endpoint, computed directly from binary32 inputs.
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The corresponding upper endpoint.
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The executable directed FMA endpoints enclose the exact single-rounding expression.
Directed binary32 square-root endpoints for the exact input 2.
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The executable endpoints enclose the exact real value sqrt 2.
Fixed grids, quantization, and double rounding #
A signed affine code set with quarter-unit spacing. The construction is not tied to a tensor layout or storage width; those choices only determine the integer code bounds.
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Every in-range code is recovered exactly after dequantization and requantization.
When saturation is inactive, nearest-even reconstruction is within half a quantization step.
Four valid codes, represented with the same shape-indexed tensor used by TorchLean models.
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Pointwise tensor Q/DQ is exact on an in-range code tensor.
Round-to-odd on a sufficiently fine binary grid prevents double rounding on the quarter grid.
IEEE exception status #
The status-bearing API records division by zero separately from invalid operation.
A training-shaped reduction #
A fixed two-term dot-product tree. Its shape records the accumulation order.
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Every intermediate product and addition in the example remains finite.
The executable dot product decodes to the computed mantissa/exponent representation of its final rounded accumulation. The two leaf multiplications are rounded before this final addition.