Executable IEEE-754 binary32 (IEEE32Exec) #
TorchLean uses two complementary ways to talk about "float32":
NN/Floats/NeuralFloat/*andNN/Floats/FP32/*model rounding-on-ℝ. This is suited to proofs and for compositional "real computation + rounding error" arguments.IEEE32Exec(in this file) models bit-level IEEE-754 behavior. This is what you want when you care about corner cases like NaN/Inf payload propagation, signed zero, and exact tie-breaking.
We implement IEEE32Exec as raw UInt32 bits and provide:
- decoders/encoders for the binary32 layout,
nextUp/nextDown(adjacent representable floats),- basic arithmetic (
+ - * / fma) by decoding to an exact dyadic/rational intermediate and then rounding once (round-to-nearest, ties-to-even), - comparisons and
min/maxwith IEEE-754 NaN rules, sqrtvia integer arithmetic on the exact input value, rounded back to binary32.
TorchLean's tensor specifications provide their Context IEEE32Exec adapter separately. The
executable kernel itself has no dependency on tensors, models, or runtime code.
About transcendentals #
IEEE-754 does not specify implementations for transcendental functions (exp, tanh, ...). In
practice those are provided by libm (or vendor math libraries) and vary across platforms.
The transcendental operations in this namespace use deterministic, pure Lean algorithms so examples
do not delegate to the host math library. Their formulas, range reduction, and rounding path are
fixed by the source. They are not claimed to be correctly rounded or to match a particular
hardware or libm; each proved or tested accuracy statement remains an explicit contract.
References #
- IEEE Standard for Floating-Point Arithmetic, IEEE 754-2019.
- David Goldberg, “What Every Computer Scientist Should Know About Floating-Point Arithmetic”, ACM Computing Surveys (1991). DOI: 10.1145/103162.103163
- Jean-Michel Muller et al., Handbook of Floating-Point Arithmetic, 2nd ed. (2018).
- S. Boldo, G. Melquiond, “Flocq: a unified Coq library for proving floating-point algorithms correct” (ARITH 2011). DOI: 10.1109/ARITH.2011.40
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ofBits (toBits x) = x.
Default inhabitant: all bits zero, i.e. +0.0.
Binary32 bit layout #
IEEE-754 binary32 is stored as:
- sign bit
sin bit 31, - exponent field
ein bits 30..23 (8 bits, bias 127), - fraction field
fin bits 22..0 (23 bits).
For NaNs, the "quiet" bit is the top fraction bit.
Mask selecting the sign bit (bit 31).
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Mask selecting the 8-bit exponent field (bits 30..23).
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Mask selecting the 23-bit fraction field (bits 22..0).
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The IEEE-754 "quiet NaN" indicator bit (top fraction bit).
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8-bit value 0xFF, used to test the “all ones” exponent field.
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True iff the sign bit (bit 31) is set.
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Extract the 8-bit exponent field (bits 30..23).
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Extract the 23-bit fraction field (bits 22..0).
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Predicate for NaN: exponent all ones and fraction nonzero.
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Predicate for quiet NaN (NaN with the quiet bit set).
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Predicate for signaling NaN (NaN with the quiet bit clear).
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Predicate for infinity: exponent all ones and fraction zero.
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Predicate for signed zero (both +0 and -0).
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Predicate for finiteness: exponent field is not all ones (excludes NaN/Inf).
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+0.0 as an executable binary32 constant.
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-0.0 as an executable binary32 constant.
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+1.0 as an IEEE-754 binary32 constant.
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-1.0 as an IEEE-754 binary32 constant.
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+∞ as an executable binary32 constant.
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-∞ as an executable binary32 constant.
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A canonical quiet NaN payload used by the executable kernel.
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NaN selection / payload propagation #
IEEE-754 leaves some freedom in how NaNs are "chosen" when multiple NaNs appear. For reproducibility (and nicer debugging), we make the choice deterministic (left-to-right) and we quiet signaling NaNs by setting the quiet bit.
Quiet a NaN by setting the quiet bit (and leave non-NaNs unchanged).
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If x is a NaN, return it (quieted).
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Choose a NaN from two operands.
This is the "NaN propagation" policy used by most binary ops in this file:
- if any operand is a signaling NaN, return that operand (quieted), left-to-right,
- otherwise if any operand is a quiet NaN, return that operand, left-to-right,
- otherwise return
none.
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Smallest positive subnormal (bit pattern 0x00000001, value 2^-149).
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Smallest negative subnormal (bit pattern 0x80000001, value -2^-149).
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Largest finite positive float32 (bit pattern 0x7F7FFFFF).
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Largest finite negative float32 (bit pattern 0xFF7FFFFF).
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Flip only the sign bit.
IEEE sign-bit operations do not quiet signaling NaNs: their exponent, payload, and quiet/signaling classification are preserved. Arithmetic operations quiet an sNaN when they consume it.
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Clear only the sign bit, preserving every NaN payload bit and its quiet/signaling class.